IBM claims world’s first sub-1 nanometer chip technology

IBM announced a new chip architecture called "nanostack" that can fit nearly 100 billion transistors on a fingernail-sized chip, roughly doubling the transistor density of its previous generation. The technology is described as "sub-1 nanometer" because it delivers computing performance improvements expected from theoretically smaller transistors, though actual physical features cannot be built smaller than 1 nanometer due to physical limitations. The nanostack architecture vertically stacks transistors in a staggered layout and could provide up to 50 percent higher computing performance or 70 percent greater energy efficiency compared to previous chips, along with 40 percent improvement in memory scaling for AI applications. Commercial chips using this technology are expected to begin production within five to ten years and could eventually replace the current mainstream nanosheet architecture used by leading semiconductor manufacturers.